quadric, Inc develops the Chimera GPNPU (General Purpose Neural Processing Unit), a licensable processor IP architecture that combines neural network inference acceleration with full C++ programmability in a single unified design. The architecture is intended to replace fragmented multi-processor approaches by handling both machine-learning workloads and traditional DSP or control code on one chip. It scales from 1 to 864 TOPS, is optimised for single-batch latency, and uses instruction-encoded data movement for deterministic timing. The architecture supports ASIL B/D certification, making it applicable to safety-critical automotive systems alongside consumer electronics, enterprise, robotics, and other edge markets.
Alongside the hardware IP, quadric provides the Chimera SDK - a comprehensive software stack that includes a graph compiler capable of auto-compiling hundreds of models, ONNX import from PyTorch and TensorFlow, an LLVM-based compiler, and Python extensibility through the company's ChiPy™ interface. The toolchain is designed to work uniformly across an entire chip line, reducing the integration and maintenance burden typically associated with multiple heterogeneous accelerators.
The technical domains quadric operates across include edge AI, on-device inference, compiler and toolchain development, graph compilation, digital signal processing, and power-efficiency optimisation for embedded systems. The company's approach centres on providing both the processor IP and the software infrastructure needed to deploy and adapt AI workloads at the edge without partitioning applications across separate processors.
